Differential signaling is a method of transmitting two complementary signals on a transmission wire. After received, information are recognized and identified by comparing voltage difference between the two complementary signals. Differential signaling improves resistor to electromagnetic noise and is widely applied to high speed circuit design.
FIG. 1 is a schematic diagram illustrating a differential circuit. The differential circuit 11a includes a first transistor M1, a second transistor M2, a third transistor M3, and a fourth transistor M4. The first and the second transistors M1, M2 are PMOS transistors, and the third and the fourth transistors M3, M4 are NMOS transistors.
Source, gate, and drain of the first transistor M1 are respectively electrically connected to a high voltage VH, a negative input signal D−, and a first transmission wire TXP. Source, gate and drain of the third transistor M3 are respectively electrically connected to a low voltage VL, the negative input signal D−, and the first transmission wire TXP.
Source, gate, and drain of the second transistor M2 are respectively electrically connected to the high voltage VH, a positive input signal D+, and a second transmission wire TXN. Source, gate, and drain of the fourth transistor M4 are respectively electrically connected to the low voltage VL, the positive input signal D+, and the second transmission wire TXN. The first transmission wire TXP and the second transmission wire TXN form a differential pair.
As shown in FIG. 1, differential transmission wires of the differential circuit 11a are connected to an external circuit 13a. The external circuit 13a includes an external resistor Rext connected in between the first transmission wire TXP and the second transmission wire TXN. According to specification of Low Voltage Differential Signaling (hereinafter, LVDS), the external resistor is 1000, a voltage of +300 mV or −300 mV is generated at two terminals of the external resistor to represent two logic levels. Therefore, an external current flows the external resistor is +3 mA(+300 mV/1000) or −3 mA(−300 mV/1000).
Referring to FIG. 1, the first transistor M1 is turned on, the second transistor is M2 is turned off, the third transistor is turned off, and the fourth transistor M4 is turned on when voltage of the negative input signal D− is low level and voltage of the positive input signal D+ is high level. Meanwhile, the external current Iext flows from the high voltage VH to the low voltage VL via the first transistor M1, the first transmission wire TXP, the external resistor Rext, the second transmission wire TXN and the fourth transistor M4. Therefore, voltage across the external resistor Rext is +300 mV when the external current Iext is 3 mA.
On the other hand, when the negative input signal D− is high level and the positive input signal D+ is low level, the first transistor M1 is turned off, the second transistor M2 is turned on, the third transistor M3 is turned on and the fourth transistor is turned off. In such case, the external current Iext flows from the high voltage VH to the low voltage VL via the second transistor M2, the second transmission wire TXN, the external resistor Rext, the first transmission wire TXP and the third transistor M3. Therefore, when the external current Iext is 3 mA, voltage across the external resistor Rext is −300 mV.
According to the above, the external current Iext always flows from the high regardless changes of the negative input signal D− and the positive input signal D+.
In general, a differential circuit system includes plural differential circuits. The plural differential circuits are connected in parallel between the high voltage VH and the low voltage VL. When all differential circuits in the differential circuit system simultaneously operate, the external current corresponding to each differential circuit are superposed. Thus, a large superposed current will be generated accordingly. Take LVDS specification as an example, when 20 differential circuits in the differential current system operate simultaneously, a superposed current with 60 mA (20×3 mA) is generated. Consequently, maintenance of the high voltage VH and the low voltage VL is important.